Testing and evaluating various devices at high frequencies is typically performed to verify the functionality of the devices. However, such testing and evaluating may become a problem for a number of reasons. First, interfacing an external high frequency signal stimulus at the wafer probe level to a device under test requires expensive and time consuming setup.
Second, the measurement of the stimulus, via a feedback loop, is often erroneous due to the electrical stub presented by the probe needle. As a result, it is difficult to ascertain the actual stimulus amplitude that is applied to the device under test.
Third, since the input impedance for various devices under test can change, the signal stimulus must be compensated for each device wherein this compensation procedure may be time consuming.
Fourth, current technology limits the applied stimulus signal to approximately 1.6 GHz. However, device capabilities have already exceeded 2.6 GHz. Thus, without a better method to test the devices, the high frequency functionality and capability of the devices may never be verified.
Hence, what is needed is an improved method for accurately testing devices at high frequency.